HD6433937 Datasheet, PDF (448/521 Pages) Hitachi Semiconductor – Hardware Manual

SCSR1—Serial control status register 1
Bit
7
6
5
4
—
SOL ORER —
Initial value
1
0
0
1
Read/Write
—
R/W R/(W)* —
H'A1
SCI1
3
2
1
0
—
—
MTRF STF
1
1
0
0
—
—
R
R/W
Start flag
0 Read Transfer operation stopped
Write Invalid
1 Read Transfer operation in progress
Write Starts transfer operation
Tail mark transmission flag
0 Idle state, or 8-bit/16-bit data transfer in progress
1 Tail mark transmission in progress
Overrun error flag
0 Clearing conditions:
After reading ORER = 1, cleared by writing 0 to ORER
1 Setting conditions:
When an external clock is used and the clock is input
after transfer is completed
Extension data bit
0 Read SO₁ output level is low
Write Changes SO₁ output to low level
1 Read SO₁ output level is high
Write Changes SO₁ output to high level
Note: * Only a write of 0 for flag clearing is possible.
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