HD6433937 Datasheet, PDF (488/521 Pages) Hitachi Semiconductor – Hardware Manual

CKSTPR1—Clock stop register 1
H'FA
System control
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
S1CKSTP S31CKSTP S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Timer A module standby mode control
0 Timer A is set to module standby mode
1 _{Timer A module standby mode is cleared}
Timer C module standby mode control
0 Timer C is set to module standby mode
1 _{Timer C module standby mode is cleared}
Timer F module standby mode control
0 Timer F is set to module standby mode
1 _{Timer F module standby mode is cleared}
Timer G interrupt enable
0 Timer G is set to module standby mode
1 _{Timer G module standby mode is cleared}
A/D converter module standby mode control
0 A/D converter is set to module standby mode
1 _{A/D converter module standby mode is cleared}
SCI32 module standby mode control
0 SCI32 is set to module standby mode
1 _{SCI32 module standby mode is cleared}
SCI31 module standby mode control
0 SCI31 is set to module standby mode
1 _{SCI31 module standby mode is cleared}
SCI1 module standby mode control
0 SCI1 is set to module standby mode
1 SCI1 module standby mode is cleared
476