HD6433937 Datasheet, PDF (130/521 Pages) Hitachi Semiconductor – Hardware Manual

Table 5-5 Setting and Clearing Module Standby Mode by Clock Stop Register
Register Name Bit Name
Operation
CKSTPR1
TACKSTP 1 Timer A module standby mode is cleared
0 Timer A is set to module standby mode
TCCKSTP 1 Timer C module standby mode is cleared
0 Timer C is set to module standby mode
TFCKSTP 1 Timer F module standby mode is cleared
0 Timer F is set to module standby mode
TGCKSTP 1 Timer G module standby mode is cleared
0 Timer G is set to module standby mode
ADCKSTP 1 A/D converter module standby mode is cleared
0 A/D converter is set to module standby mode
S1CKSTP 1 SCI1 module standby mode is cleared
0 SCI1 is set to module standby mode
S32CKSTP 1 SCI32 module standby mode is cleared
0 SCI32 is set to module standby mode
S31CKSTP 1 SCI31 module standby mode is cleared
0 SCI31 is set to module standby mode
Table 5-5 Setting and Clearing Module Standby Mode by Clock Stop Register (cont)
Register Name Bit Name
Operation
CKSTPR2
WDCKSTP 1 Watchdog timer module standby mode is cleared
0 Watchdog timer is set to module standby mode
Note: For details of module operation, see the sections on the individual modules.
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