HD6433937 Datasheet, PDF (376/521 Pages) Hitachi Semiconductor – Hardware Manual

3. HEX / Binary, Alphanumeric, and Secure Message Vector
Table 12-23 HEX / Binary, Alphanumeric, and Secure Message Vector Packet Bit
Assignments
Byte 3
Byte 2
Byte 1
Byte 0
Bit 7
0
e
x
n₀
Bit 6
WN ₆
p₁
x
b₆
Bit 5
WN₅
p₀
n₆
b₅
Bit 4
WN₄
x
n₅
b₄
Bit 3
WN₃
x
n₄
b₃
Bit 2
WN ₂
V₂
n₃
b₂
Bit 1
WN₁
V₁
n₂
b₁
Bit 0
WN ₀
V₀
n₁
b₀
V: Vector type identifier.
V₂ V₁ V₀
00 0
10 1
11 0
Type
Secure
Alphanumeric
Hex / Binary
WN: Word number of vector (2 - 87 decimal). Describes the location of the vector word in the
frame.
e: Set if more than 2 bit errors are detected in the word, if the check character calculation fails
after error correction has been performed, or if the vector value is determined to be invalid.
p: Phase on which the vector was found (0=a, 1=b, 2=c, 3=d)
n: Number of message words in this frame including the first Message word that immediately
follows a long address vector. Valid values are 1 through 85 decimal.
b: Word number of message start in the message field. Valid values are 3 through 87 decimal.
x: Unused bits. The value of these bits is not guaranteed.
Note: For long addresses, the first Message Packet is sent from the word location immediately
following the word location of the Vector Packet. The b bits indicate the second message
word in the message field if one exists.
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