HD6433937 Datasheet, PDF (352/521 Pages) Hitachi Semiconductor – Hardware Manual

RESET
Decoder disables itself
Decoder initializes
checksum register to
Part ID value
Decoder initiates
Part ID Packet
Decoder waits for
SPI packet from host
Yes
Checksum Packet?
No
Yes
Decoder enabled?
No
Packet data
No
matches checksum
register data?
Yes
Decoder enables itself
Decoder disables itself
Decoder sets
checksum register to the
XOR of the packet data
bits with the checksum
register bits
Figure 12-7 FLEX decoder Checksum Flow Chart
340