HD6433937 Datasheet, PDF (65/521 Pages) Hitachi Semiconductor – Hardware Manual

Example 2: BSET instruction executed designating port 3
P3₇ and P3₆ are designated as input pins, with a low-level signal input at P3₇ and a high-level
signal at P3₆. The remaining pins, P3₅ to P3₀, are output pins and output low-level signals. In this
example, the BSET instruction is used to change pin P3₀ to high-level output.
[A: Prior to executing BSET]
Input/output
Pin state
PCR3
PDR3
P3₇
Input
Low
level
0
1
P3₆
Input
High
level
0
0
P3₅
Output
Low
level
1
0
P3₄
Output
Low
level
1
0
P3₃
Output
Low
level
1
0
P3₂
Output
Low
level
1
0
P3₁
Output
Low
level
1
0
P3₀
Output
Low
level
1
0
[B: BSET instruction executed]
BSET #0 , @PDR3
The BSET instruction is executed designating port 3.
[C: After executing BSET]
Input/output
Pin state
PCR3
PDR3
P3₇
Input
Low
level
0
0
P3₆
Input
High
level
0
1
P3₅
Output
Low
level
1
0
P3₄
Output
Low
level
1
0
P3₃
Output
Low
level
1
0
P3₂
Output
Low
level
1
0
P3₁
Output
Low
level
1
0
P3₀
Output
High
level
1
1
[D: Explanation of how BSET operates]
When the BSET instruction is executed, first the CPU reads port 3.
Since P3₇ and P3₆ are input pins, the CPU reads the pin states (low-level and high-level input).
P3₅ to P3₀ are output pins, so the CPU reads the value in PDR3. In this example PDR3 has a value
of H'80, but the value read by the CPU is H'40.
Next, the CPU sets bit 0 of the read data to 1, changing the PDR3 data to H'41. Finally, the CPU
writes this value (H'41) to PDR3, completing execution of BSET.
As a result of this operation, bit 0 in PDR3 becomes 1, and P3₀ outputs a high-level signal.
However, bits 7 and 6 of PDR3 end up with different values.
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