HD6433937 Datasheet, PDF (73/521 Pages) Hitachi Semiconductor – Hardware Manual

3.3 Interrupts
3.3.1 Overview
The interrupt sources that initiate interrupt exception handling comprise 12 external interrupts
(WKP₇ to WKP₀, IRQ₄ to IRQ₁), 23 internal interrupts from on-chip peripheral modules, and one
internal IRQ₀ interrupt. Table 3-2 shows the interrupt sources, their priorities, and their vector
addresses. When more than one interrupt is requested, the interrupt with the highest priority is
processed.
The interrupts have the following features:
• Internal and external interrupts can be masked by the I bit in CCR. When the I bit is set to 1,
interrupt request flags can be set but the interrupts are not accepted.
• IRQ₄ to IRQ₀ and WKP₇ to WKP₀ can be set to either rising edge sensing or falling edge
sensing.
61