HD6433937 Datasheet, PDF (480/521 Pages) Hitachi Semiconductor – Hardware Manual

SYSCR1—System control register 1
H'F0
Bit
7
6
5
4
3
2
SSBY STS2 STS1 STS0 LSON —
Initial value
0
0
0
0
0
1
Read/Write
R/W R/W R/W R/W R/W
—
System control
1
MA1
1
R/W
0
MA0
1
R/W
Active (medium-speed)
mode clock select
0 0 øosc /16
1 ø_osc /32
1 0 ø_osc /64
1 øosc /128
Low speed on flag
0 The CPU operates on the system clock (ø)
1 The CPU operates on the subclock (ø_SUB)
Standby timer select 2 to 0
0 0 0 Wait time = 8,192 states
1 Wait time = 16,384 states
1 0 Wait time = 1,024 states
1 Wait time = 2,048 states
1 0 0 Wait time = 4,096 states
1 Wait time = 2 states
1 0 Wait time = 8 states
1 Wait time = 16 states
Software standby
0 • When a SLEEP instruction is executed in active mode, a transition is
made to sleep mode
• When a SLEEP instruction is executed in subactive mode, a transition
is made to subsleep mode
1 • When a SLEEP instruction is executed in active mode, a transition is
made to standby mode or watch mode
• When a SLEEP instruction is executed in subactive mode, a transition
is made to watch mode
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