HD6433937 Datasheet, PDF (432/521 Pages) Hitachi Semiconductor – Hardware Manual

Instruc-
tion
Mnemonic
Instruction Branch
Stack Byte Data Word Data Internal
Fetch
Addr. Read Operation Access Access Operation
I
J
K
L
M
N
BTST
BTST #xx:3, Rd
1
BTST #xx:3, @Rd 2
1
BTST #xx:3, @aa:8 2
1
BTST Rn, Rd
1
BTST Rn, @Rd
2
1
BTST Rn, @aa:8
2
1
BXOR
BXOR #xx:3, Rd
1
BXOR #xx:3, @Rd 2
1
BXOR #xx:3, @aa:8 2
1
CMP
CMP. B #xx:8, Rd
1
CMP. B Rs, Rd
1
CMP.W Rs, Rd
1
DAA
DAA.B Rd
1
DAS
DAS.B Rd
1
DEC
DEC.B Rd
1
DIVXU DIVXU.B Rs, Rd
1
12
EEPMOV EEPMOV
2
2n+2*
1
INC
INC.B Rd
1
JMP
JMP @Rn
2
JMP @aa:16
2
2
JMP @@aa:8
2
1
2
JSR
JSR @Rn
2
1
JSR @aa:16
2
1
2
JSR @@aa:8
2
1
1
LDC
LDC #xx:8, CCR
1
LDC Rs, CCR
1
MOV
MOV.B #xx:8, Rd
1
MOV.B Rs, Rd
1
MOV.B @Rs, Rd
1
1
MOV.B @(d:16, Rs), 2
1
Rd
MOV.B @Rs+, Rd 1
1
2
MOV.B @aa:8, Rd 1
1
MOV.B @aa:16, Rd 2
1
MOV.B Rs, @Rd
1
1
Note: * n: Initial value in R4L. The source and destination operands are accessed n + 1 times
each.
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