CD2481 Datasheet, PDF (70/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
6.0
6.1
6.1.1
Microcode Download
The CD2481 has no on-chip protocol processing code; the ROM included on-chip performs only
boot-time tasks such as initializing hardware resources and clearing internal RAM-based register
storage locations. All protocol specific microcode is included in code that is downloaded into on-
chip RAM microcode storage. This chapter explains the procedure that must be performed to
download the microcode into the internal RAM. Refer to the protocol documentation in Chapter 5
for descriptions of which features are supported in the standard microcode image.
Microcode Download Information
Downloading microcode to the internal RAM is simply accomplished using registers within the
CD2481. The device performs the write operations to move data into the microcode storage RAM
by executing instructions and using data supplied by the host. The following section details the
registers that are used in the download operation. Following that section is an example program
segment (written in ‘C’) showing one method of performing the download. In the register
descriptions below, bold type indicates the bits pertinent to download operations.
Registers Specific to Download Operations
BIL Test Control Register (write only) {BTCR}
MPU Test Control Register - Write Only) {MTCR}
Auxiliary Instruction Register Low (write only) {AIRl}
Auxiliary Instruction Register Middle (write only) {AIRm}
Auxiliary Instruction Register High (write only) {AIRh}
INT MOT SZE ACCESS
F4
F6
B
W
F3
F1
B
W
F0
F2
B
W
F1
F3
B
W
F2
F0
B
W
BIL Test Control Register (write only) {BTCR}
F4
F6
B
W
7
6
EnSync
0
5
4
3
2
1
0
0
0
ByteDMA
0
SnglStp
ClkDis
This register is write only and not available as read, no miss-operation will occur if the register is
read but the read value will not be consistent.
Bit 1 - SnglStp
Writing a one to this location when the internal clock is disabled via ClkDis causes a single
step (single instruction) to be executed.
Bit 0 - ClkDis
Writing a one to this location causes the internal clock to be disabled. While in the disabled
state normal register access is available.
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Datasheet