CD2481 Datasheet, PDF (109/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

Programmable Four-Channel Communications Controller — CD2481
8.4
Receive DMA Interrupt Service Routine
The following example shows an interrupt service routine for the CD2481 in DMA mode. The
buffer class array ‘ib[ ]’ is used for notational convenience, and its exact implementation is user-
defined. The upper ( ) and lower ( ) functions should return the upper and lower 16 bits of the DMA
address for the current buffer segment. The nxt_buf( ) accesses the next segment.
If the system uses separate interrupt handlers for receive, transmit, and modem interrupts, the
channel number can be obtained from the lower 2 bits of the Interrupt register (RIR/TIR/MIR).
Otherwise, use LIVR first to determine the type of interrupt. Receive ‘Good Data’ interrupts
should not occur during DMA transfers. The normal exception is when end of frame is received.
DMABSTS shows which buffer the CD2481 expects to use next. Fill the descriptor registers for
that buffer, including the 2481OWN bit and return. The last access to the CD2481 during the
service routine is the REOIR.
int risrl = inportb( RISRL );// low status
int ch = inportb( RIR ) & 0x03;// channel number
switch( inport(LIVR) & 0x03 ) {
case LIVR_GOODDATA:// shouldn’t happen in DMA
break;
case LIVR_EXCEPTION:// EOF is ’normal’ exception
if( risrl & RISR_EOF ) {
if( inportb(DMABSTS) & DMABS_NRBUF ) {// buffer B next
outport( BRBADRU, ib[ch].upper() );
outport( BRBADRL, ib[ch].lower() );
outport( BRBCNT, BUF_MAX );
outport( BRBSTS, OWN_2481 );
ib[ch].nxt_buf();// get next buffer
} else {// buffer A next
outport( ARBADRU, ib[ch].upper() );
outport( ARBADRL, ib[ch].lower() );
outport( ARBCNT, BUF_MAX );
outport( ARBSTS, OWN_2481 );
ib[ch].nxt_buf();// get next buffer
}
}
}
outportb( REOIR, ZERO );
Datasheet
109