CD2481 Datasheet, PDF (198/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
9.7.2.2
Receive Time-Out Period Register high (RTPRh) – Async Modes Only
Register Name: RTPRh
Register Description: Receive Time-Out Period Register, High Byte
Default Value: x’00
Access: Byte Read/Write, ASYNC Mode Only
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Binary Value, bits 15 - 8
Intel Hex Address: x’27
Motorola Hex Address: x’24
Bit 2
Bit 1
Bit 0
9.7.3
Receive Time-Out Period register (16-bits)
This value sets the receive data time-out period. As each character is moved to the receive FIFO or
the last data is transferred from the FIFO to the host, the receive timer (an internal timer) is
reloaded with the Receive Time-Out Period register. The receive timer is decremented on each
‘tick’ of the prescaler counter, whose period is controlled by TPR. If the receive timer reaches zero,
it causes a receive data interrupt.
General Timer 1 (GT1) – Sync Modes Only
Register Name: GT1
Register Description: General Timer 1
Default Value: x’00
Access: Word Read/Write
Bit 15
Bit 14
Bit 13
Bit 7
Bit 6
Bit 5
Bit 12
Bit 11
Binary Value, bits 15 - 8
Bit 4
Bit 3
Binary Value, bits 7 - 0
Intel Hex Address: x’28
Motorola Hex Address: x’2A
Bit 10
Bit 9
Bit 8
Bit 2
Bit 1
Bit 0
9.7.3.1
General Timer 1 low (GT1l) – Sync Modes Only
Register Name: GT1l
Register Description: General Timer 1, high byte
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Binary Value, bits 7 - 0
Intel Hex Address: x’28
Motorola Hex Address: x’2B
Bit 2
Bit 1
Bit 0
198
Datasheet