CD2481 Datasheet, PDF (137/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

Programmable Four-Channel Communications Controller — CD2481
9.2.9.2
Special Character Register 2 (SCHR2)
Register Name: SCHR2
Register Description: Special Character Register 2
Default Value: x’00
Access: R/W – Async
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
User defined special character,
protocol defined special characters (see below).
Intel Hex Address: x’1D
Motorola Hex Address: x’1E
Bit 1
Bit 0
Asynchronous Mode
Special characters 1 and 2 are used in conjunction with the SCDE bit of COR3 to detect incoming
characters; when both SCDE and TxIBE (COR2) are set, they define the in-band flow control
characters XON and XOFF.
SCHR1 = XON
SCHR2 = XOFF
In addition to the SCDE and TxIBE bits, if the FCT bit (COR3) is set when flow control characters
are received, they are stripped from the data stream.
MNP4 Mode
SCHR1 holds the start character.
SCHR2 holds the escape character.
These values vary depending on whether the mode is ARAP 1.0 or ARAP 2.0:
MNP4/ARAP 1.0 ARAP 2.0
SCHR1
SYN 16 hex
SCHR2
DLE 10 hex
SOH 01 hex
ESC 1B hex
Programmable Sync Mode
SCHR 1-4 define up to four EOF patterns for delimiting frames. If less than the maximum number
of EOF patterns is needed (only two, for example), then the unused SCHR registers should
duplicate the defined values. In this case, SCHR1 and SCHR2 define two EOF characters, SCHR3
and SCHR4 duplicate these values.
Datasheet
137