CD2481 Datasheet, PDF (140/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
9.2.12.2 Receive Frame Address Register 2 (RFAR2)
Register Name: RFAR2
Register Description: Receive Frame Address Register 2
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Frame Qualification Address 1
Bit 2
9.2.12.3 Receive Frame Address Register 3 (RFAR3)
Intel Hex Address: x’1D
Motorola Hex Address: x’1E
Bit 1
Bit 0
Register Name: RFAR3
Register Description: Receive Frame Address Register 3
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Frame Qualification Address 3
Bit 2
Intel Hex Address: x’1E
Motorola Hex Address: x’1D
Bit 1
Bit 0
9.2.12.4 Receive Frame Address Register 4 (RFAR4)
Register Name: RFAR4
Register Description: Receive Frame Address Register 4
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Frame Qualification Address 4
Bit 2
Intel Hex Address: x’1F
Motorola Hex Address: x’1C
Bit 1
Bit 0
Reception of an HDLC frame can be qualified with a matched 1- or 2-byte address field either as
four 1-byte alternatives or two 2-byte alternatives. The use of RFAR registers for address
recognition is described in the Channel Option registers (COR1) on “Channel Option Register 1
(COR1)” on page 114.
140
Datasheet