CD2481 Datasheet, PDF (126/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
Bit 5
Bit 4
Bit 3
Bits 2:0
1 = Characters between SCRl and SCRh (inclusive) generate special character inter-
rupts.
FCT – Flow Control Transparency mode
0 = Flow control characters received are passed to the host by receive exception
interrupts.
1 = Flow control characters received are not passed to the host.
This bit has no effect unless both TxIBE (COR2) and SCDE (COR3) are set.
SCDE – Special character detection
0 = Special character detect for SCHR1 and 2 is disabled.
1 = Special character detect for SCHR1 and 2 is enabled.
This bit must be set along with TxIBE (COR2) before FCT (COR3) becomes effec-
tive.
Splstp – Special character I-strip
When set, this bit causes the receive character to be I-stripped (bit 7 set to ‘0’) for
the special character matching functions only. The character passed to the host is
unaffected. This function allows special character processing of data without know-
ing if the data is 8 bit with no parity or 7 bit with parity.
Stop2, Stop1, Stop0 – Stop bit length
Specifies the length of the Stop bit.
Stop2
Stop1
Stop0
0
1
0
0
1
1
1
0
0
000–001 and 110–111 are reserved.
Stop Bit Length
1 stop bit
1.5 stop bits
2 stop bits
COR3 – X.21 Mode
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
SglSyn
SSDE
StrpSyn
SCDE
Bit 3
0
Intel Hex Address: x’15
Motorola Hex Address: x’16
Bit 2
0
Bit 1
0
Bit 0
0
Bit 7
Single SYN
This bit determines the number of SYN characters that need to be received before
Character Synchronization mode is considered received.
0 = Two SYN characters are required.
1 = One SYN character is required.
Note: The SglSyn option is only available for Extended X.21 Mode; standard X.21 mode always requires
two SYN characters. When the SglSyn option is set, StrpSyn and SCDE options are disabled.
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Datasheet