CD2481 Datasheet, PDF (61/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

Programmable Four-Channel Communications Controller — CD2481
An external clock input can be used, and it can be at a multiple of the desired bit rate. If so, the
appropriate divisor value must be loaded into the Bit Rate Period register. If the external clock is at
the desired bit rate, (1× clock) a value of 01h must be loaded into the associated Bit Rate Period
register.
The receive bit rate generator can also be programmed to act as a DPLL (Digital Phase Locked
Loop). In that mode, the clock select and divisor are programmed to be as near as possible to the
nominal receive bit rate. Clock phase adjustments are made by the DPLL logic to lock to the
incoming data stream. The receive bit clock is an optional input to the transmitter. This makes it
possible to use the DPLL derived clock to synchronize the transmit data stream.
Section 5.2 shows examples for programming standard bit rates. The value to be loaded to set a
given bit rate is determined by the following equation:
Bit rate divisor = ^{F----r--e---q---u---e--n---c---y----o---f----c---h---o---s--e---n----c---l-o---c---k-----s--o---u---r--c---e-} – 1
Desired bit rate
Note:
The above equation, in general, yields a non-integer result. The nearest integer value, along with
the clock source, is the optimum choice for that bit rate. The value loaded in the period register
must be that integer expressed as an 8-bit binary value. The bit-rate error is the difference between
the integer value and the ideal value, expressed as a percentage.
Example 1
Illustrates programming the bit rate generator at 64 kbps using internal clock, at a system clock
frequency of 35 MHz.
Divisor loaded into R/TBPR^† = 67 or 43h
Value loaded into R/TCOR = 00h, to select clk0
Example 2
Illustrates programming the bit rate generator at 56,000 bps using external clock. Again, the system
clock frequency is assumed to be at 35 MHz.
The user provides a 1.25-MHz clock on the RxCin or TxCin pin.
Divisor loaded into R/TBPR = 21 or 15h
Value loaded into RCOR = 06h, to select External Clock mode
Value loaded into TCOR = C0h, to select External Clock mode
†. R/T is used as a register abbreviation indicating Receive/Transmit followed by the register acronym.
Datasheet
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