CD2481 Datasheet, PDF (129/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

Programmable Four-Channel Communications Controller — CD2481
npad3
0
0
0
1
COR3 – MNP4 Mode
npad2
0
0
0
1
npad1
0
0
1
1
npad0
0
1
0
1
Number of leading
pads
0
1
2
15
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Stop2
0
RxChk
TxGen
Bit 3
npad3
Intel Hex Address: x’15
Motorola Hex Address: x’16
Bit 2
npad2
Bit 1
npad1
Bit 0
npad0
Note: SLIP, MNP4, and Automatic In-Band Flow Control modes are only available on Revision B and
later devices.
Bit 7
Stop2
0 = 1 Stop bit
1 = 2 Stop bit
Bit 6
Reserved – must be zero.
Bit 5
RxChk – Receive FCS check enabled
When clear, the channel does not test the 2-byte FCS field. All frame data characters
are given to the host.
When set, the channel tests the 2-byte FCS field.
Bit 4
TxGen – Transmit FCS enabled
When clear, the channel does not add the 2-byte FCS field.
When set, the channel adds the 2-byte FCS field at the end of the frame.
Bits 3:0
npad3, npad2, npad1, npad0 – Transmit frame leading pads
The number of character times preceding any frame transmission. A character time
is 10 bit times. All zeros in this field disables the leading pads.
npad3
0
0
0
1
npad2
0
0
0
1
npad1
0
0
1
1
npad0
0
1
0
1
Number of leading
pads
0
1
2
15
Datasheet
129