CD2481 Datasheet, PDF (68/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
5.6.1
Interface to a 32-Bit Data Bus
To interface to a 32-bit data bus, two 16-bit data buffers must be used to isolate the CD2481 A/
D[0–15] pins from either half of the 32-bit bus. The A[1] address pin determines if the lower or
upper half of the data bus is in use for a particular bus cycle. The CD2481 always drives all 16 data
bits during a register read or a DMA write operation, regardless of the size of the actual transfer.
5.6.2
DMA Connections for the CD2481
Figure 14. DMA Connections for the CD2481
DATEN* en
DATDIR* dir
R/W*
DS*
DTACK*
A/D [0–15]
ADLD*
A[0–7]
AEN*
AS*
16-Bit
Data
Xcvr
DATA [0–15]
24-Bit
Latch
[16–31]
STROBE* _[8–31]
[8–15]
[0–7]
32-Bit
Address
Driver
MA [0–31]
NOTES:
1. The 24-bit latch is REQUIRED.
2. The 16-bit transceiver is OPTIONAL depending on application.
3. The 32-bit driver is OPTIONAL depending on drive needs.
5.6.3
Recommended CD2481 as a DTE and DCE Interface
Table 10 shows the recommended DTE (data terminal equipment) connections between the
CD2481 and RS-232-C, X.21 and X.21bis standard interfaces.
Table 10. DTE Connections
CD2481
RXD
TXD
RTS*
RS-232-C
BB
BA
CA
X.21
R
T
C
X.21bis (V.24)
104
103
105
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Datasheet