CD2481 Datasheet, PDF (218/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

H
hardware configurations
32-bit data bus 68
DMA connections 68
DTE and DCE interface 68
hardware signals and IACK cycles 42
HDLC mode 114, 116, 123, 153, 165
host interface 37
host read and write cycles 37
host read/write 202, 205
I
IACKIN* 43
IACKOUT* 43
Idle mode 124
interrupt acknowledge 203, 206
interrupts
acknowledge cycle 41
contexts and channels 40
groups and types 41
IACK cycles 42
keep and pass logic 43
multi–CD2481 systems 43
registers 40
systems with interrupt controllers 43
transmit and receive interrupt service re-
quests 42
K
keep and pass logic 43
L
Local Loopback mode 147
logic, keep and pass 43
M
mapped characters
00–1F 78
20 and above 78
7D and 7E 78
in the FCS field 79
Mark Idling mode 123
memory map 20
MNP4 mode 129
MNP4/SLIP mode 122
modes
Addressing mode 114
Append mode 58
Async-HDLC/PPP mode 127, 151, 156
Async-HDLC/PPP/MNP4 mode 169
Asynchronous DMA mode 59
Asynchronous mode 26, 118, 125, 155,
167
Asynchronous/Async-HDLC/PPP mode
118, 120
Bisynchronous mode 117, 124, 154
Chain mode 49
DPLL mode 145
FCS mode 124
FCT (flow control transparency) mode
126, 138
HDLC mode 114, 116, 123, 153, 165
Idle mode 124
Local Loopback mode 147
Mark Idling mode 123
MNP4 mode 129
MNP4/SLIP mode 122
Parity mode 115
PPP 120
Protocol mode 113
Receive Transfer mode 113
Remote Loopback mode 119, 121, 122
SLIP mode 128, 170
SLIP/MNP4 mode 152, 157
Syn/Flag Hunt mode 150
Synchronous mode 123
Transmit Transfer mode 113
XON mode 118, 121
multi–CD2481 systems 43
O
operations
BRG 60
218
Datasheet