CD2481 Datasheet, PDF (116/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
COR1 – Programmable Sync Mode (Not used in PPP mode)
Register Name: COR1
Register Description: Channel Option Register 1
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Idle
0
0
0
Bit 3
ChL3
Intel Hex Address: x’13
Motorola Hex Address: x’10
Bit 2
ChL2
Bit 1
ChL1
Bit 0
ChL0
Bit 7
Bits 6:4
Bits 3:0
Idle–Transmit pin idle state
This bit selects the level at which the TxD pin will be held when no frame transmis-
sion is in progress.
0 = Idle with TxD ‘low’, Idle in 0’s
1 = Idle with TxD ‘high, Idle in 1’s
Reserved - must be zero.
Character Length
ChL3
0
0
0
0
1
:
1
ChL2
1
1
1
1
0
:
1
ChL1
0
0
1
1
0
:
1
Note: Not used in PPP, MNP4, and SLIP modes.
ChL0
0
1
0
1
0
:
1
Character Length
5 bits
6 bits
7 bits
8 bits
Reserved
:
Reserved
9.2.3
Channel Option Register 2 (COR2)
COR2 – HDLC Mode
Register Name: COR2
Register Description: Channel Option Register 2
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
0
FCSApd
0
CRCNinv
Bit 3
0
Bit 7
Reserved – must be zero.
Intel Hex Address: x’14
Motorola Hex Address: x’17
Bit 2
RtsAO
Bit 1
CtsAE
Bit 0
DsrAE
116
Datasheet