CD2481 Datasheet, PDF (113/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

Programmable Four-Channel Communications Controller — CD2481
9.2
9.2.1
C1
C0
0
0
0
1
1
0
1
1
Option Registers
Channel Mode Register (CMR)
Channel
number
Channel 0
Channel 1
Channel 2
Channel 3
Register Name: CMR
Register Description: Channel Mode Register
Default Value: x’02
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
RxMode
TxMode
0
0
Bit 3
chmd3
Intel Hex Address: x’18
Motorola Hex Address: x’1B
Bit 2
chmd2
Bit 1
chmd1
Bit 0
chmd0
Bit 7
Bit 6
Bits 5:3
Bits 2:0
Receive Transfer mode
0 – Interrupt
1 – DMA
Transmit Transfer mode
0 – Interrupt
1 – DMA
Reserved – must be zero.
Protocol mode select
If these options are changed, an initialize command must be given to the CD2481
through the Channel Command register.
chmd3
0
0
0
0
0
0
chmd2
0
0
0
0
1
1
chmd1
0
0
1
1
0
0
chmd0
0
1
0
1
0
1
Protocol
HDLC
Bisync
Async
X.21
Async–HDLC/PPP
SLIP
Datasheet
113