CD2481 Datasheet, PDF (146/222 Pages) Intel Corporation – Programmable Four-Channel Communications Controller

CD2481 — Programmable Four-Channel Communications Controller
Bits 2:0
Dpllmd1
0
0
1
1
Dpllmd0
0
1
0
1
Encoding
NRZ
NRZI
Manchester
Reserved
These three bits select the clock source for the receive baud rate generator or DPLL.
clkSel2
0
0
0
0
1
1
1
1
clkSel1
0
0
1
1
0
0
1
1
clkSel0
0
1
0
1
0
1
0
1
Note: See the description of clock options in Section 5.5.
Clock Source
Clk 0
Clk 1
Clk 2
Clk 3
Clk 4
Reserved
External clock
Reserved
9.3.2
9.3.2.1
Transmit Baud Rate Generator Registers
Transmit Baud Rate Period Register (TBPR)
Register Name: TBPR
Register Description: Transmit Bit-Rate Period Register
Default Value: x’81
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Transmit Bit Rate Period (Divisor)
Intel Hex Address: x’C1
Motorola Hex Address: x’C3
Bit 1
Bit 0
This register contains the preload value for the transmit baud rate count. When using one of the
internal clocks or an n-times external clock, the preload value in conjunction with the transmitter
clock source chosen, determines the transmit baud rate. If a 1× external clock or the receive clock
is used, a value of 01h must be loaded in the TBPR.
146
Datasheet