80KSBR200 Datasheet, PDF (83/172 Pages) Integrated Device Technology – sRIO SERIAL BUFFER FLOW-CONTROL DEVICE

IDT 80KSBR200
Notes
Name: P0_ERR_DET_CSR
Address: 0x000640
Advanced Datasheet*
Bit
Field Name
Reset
Value
Comment
0
LINK_TOUT
1b0
1
UNS_CTRL_SYM 1b0
2
DELIN_ERR
1b0
3
-
0
Link Time-out:
An acknowledge or link-response control symbol is not received
within the specified time-out interval.
Unsolicited Acknowledge Control Symbol:
An unexpected acknowledge control symbol was received.
Delineation Error:
Received unaligned /SC/ or /PD/ or undefined code-group.
Reserved.
4
PROTO_ERR
1b0
5
NOUT_ACKID
1b0
16:6
-
0
17
RCV_PKT_EXC
1b0
18
RCV_BAD_CRC
1b0
19
RCV_PKT_UACK 1b0
20
RCV_PKT_NCTRL 1b0
Protocol Error:
An unexpected packet or control symbol was received.
Non-outstanding ackID:
Link-response received with an ackID that is not outstanding.
Reserved.
Received Packet Exceeds 276 Bytes:
Received packet which exceeds the maximum allowed size.
Received Packet with bad CRC:
Received packet with a bad CRC value.
Received Packet with Unexpected ackID:
Received packet with unexpected ackID value (out-of-sequence
ackID).
Received Packet-not-accepted Control Symbol:
Received packet-not-accepted acknowledge control symbol.
21
RCV_ACK_SYM
1b0
22
RCV_CC_SYM
1b0
31:23 -
0
Received Acknowledge Control Symbol with Unexpected ackID:
Received acknowledge control symbol with unexpected ackID
(packet-accepted or packet-retry).
Received Corrupt Control Symbol:
Received a control symbol with a bad CRC value.
Reserved.
Note:
1.
Table 42 Port 0 Error Detect CSR
The above register is described in the RIO Specification Part 8, sec. 2.3.2.10
Port 0 Error Rate Enable CSR
This register contains the bits that control when an error condition is allowed to increment the error rate counter in the
Port 0 Error Rate Threshold Register and lock the Port 0 Error Capture registers.
Name: P0_ERR_RATE_EN_CSR Address: 0x000644
Bit
Field Name
0
LINK_TOUT_EN
Reset
Value
Comment
1b0
Link Time-out Enable:
Enable error rate counting of link time-out errors.
Table 43 Port 0 Error Rate Enable CSR
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March 19, 2007
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.