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80KSBR200 Datasheet, PDF (143/172 Pages) Integrated Device Technology – sRIO SERIAL BUFFER FLOW-CONTROL DEVICE
IDT 80KSBR200
Notes
Advanced Datasheet*
Figure 48 Implementation of read during configuration register access
15.8 JTAG DC Electrical Specifications
At recommended operating conditions with VDD3 = 3.3V ± 5%
Figure 49 JTAG DC Electrical Specifications (VDD3 = 3.3V ± 5%)
At recommended operating conditions with VDD3 = 2.5V ± 100mV
Figure 50 JTAG DC Electrial Specifications (VDD3 = 2.5V ± 100mV )
143 of 172
March 19, 2007
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.