80KSBR200 Datasheet, PDF (37/172 Pages) Integrated Device Technology – sRIO SERIAL BUFFER FLOW-CONTROL DEVICE

IDT 80KSBR200
Advanced Datasheet*
Notes
Base Address
0x019D28 - 0x019D5C
0x019D60
0x019D64 - 0x019E0C
0x019E10
0x019E14 - 0x019E4C
0x019E50
0x019E54 - 0x019E5C
0x019E60
0x019E64 - 0x019ECC
0x019ED0
0x019ED4 - 0x019F0C
0x019F10
0x019F14 - 0x019F1C
0x019F20
Description
reserved
Missing Packet Address Log Register 1
reserved
Tally Doorbell Flag Register
reserved
Missing Packet Programmable Flag Register
reserved
DSP Interrupt Mask Register
reserved
Tally Doorbell Mask Register
reserved
Missing Packet Programmable Mask Register
reserved
Missing Packet Address Log Registers 2
Table 1 SerB Memory Map
6.3 Configuration Register Programming and Reset
There are multiple types and severity of reset capabilities. Many of the resets involve loading the configuration regis-
ters, or clearing values contained in the registers. The various resets may be performed through the following mecha-
nisms:
◆ _{External pins}
◆ _{sRIO control symbols.}
◆ _{sRIO type 8 maintenance packets}
◆ _{JTAG and I}2_{C commands}
Multiple types of resets may be generated using the reset mechanisms. The following items list the various resets, the
mechanism(s) to force the reset, the effects of the reset and other reset information:
◆ _{Master Reset - Performed after power on and anytime a full reset is needed.}
– Pin based reset or sRIO control symbol only.
– Any shadow registers are programmed to the state required by the hard-wired configuration pins.
– All configuration registers programmed to the state required by the hard-wired configuration pins.
– Any registers that do not have default values are cleared.
– All memory will be cleared.
– All flag registers will be cleared. All mask registers are set to fully masked.
– All Error counters and status registers will be cleared (not set to a programmed value).
– All PLLs will be reset.
– Any existing state machines will be initialized to a known state.
– Any changes are immediate
◆ _{Partial Reset - Performed anytime and affects all registers. (An example of this type of reset would be the}
changing of a port data rate).
– sRIO maintenance packet reset, JTAG, or I²C based reset. This reset is performed by "hitting" the reset
configuration register.
– Shadow registers are not affected.
– Configuration registers with shadow registers are programmed to the shadow values.
– Configuration registers without shadow registers are cleared.
– All memory will be cleared
– All flag registers will be cleared. All mask registers are set to fully masked.
– All Error counters and status registers will be cleared (not set to a programmed value).
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March 19, 2007
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
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