80KSBR200 Datasheet, PDF (141/172 Pages) Integrated Device Technology – sRIO SERIAL BUFFER FLOW-CONTROL DEVICE

IDT 80KSBR200
Notes
Advanced Datasheet*
Version Part Number Manuf ID LSB
0000
0000|0100|1111|0000 0000|0011|011
1
Figure 106 System Controller Device ID Instruction Format
15.5.6 EXTEST PULSE
This IEEE 1149.6 instruction applies only to the AC-coupled pins. All DC pins will perform as if the IEEE Std 1149.1
EXTEST instruction is operating whenever the EXTEST_PULSE instruction is effective.
The EXTEST_PULSE instruction enables edge-detecting behavior on signal paths containing AC pins, where test
receivers reconstruct the original waveform created by a driver even when signals decay due to AC-coupling.
As the operation name suggests, enabling EXTEST_PULSE causes a pulse to be issued which can be detected even
on AC-coupled receivers. Refer to the IEEE Std 1149.6 for full details. Below is a short synopsis.
If enabled, the output signal is forced to the value in its associated Boundary-Scan Register data cell for its driver (true
and inverted values for a differential pair) at the falling edge of TCK in the Update-IR and Update-DR TAP Controller
states. The output subsequently transitions to the opposite of that state (an inverted state) on the first falling edge of TCK
that occurs after entering the Run-Test/Idle TAP Controller state. It then transitions back again to the original state (a non-
inverted state) on the first falling edge of TCK after leaving the Run-Test/Idle TAP Controller state.
15.5.7 EXTEST TRAIN
This IEEE 1149.6 instruction applies only to the AC-coupled pins. All DC pins will perform as if the IEEE Std 1149.1
EXTEST instruction is operating whenever the EXTEST_PULSE instruction is effective.
The EXTEST_TRAIN instruction enables edge-detecting behavior on signal paths containing AC pins, where test
receivers reconstruct the original waveform created by a driver even when signals decay due to AC-coupling.
As the operation name suggests, enabling EXTEST_TRAIN causes a pulse train to be issued which can be detected
even on AC-coupled receivers. Once in an enabled state, the train will be sent continuously in response to the TCK clock.
No other signaling is required to generate the pulse train while in this state. Refer to the IEEE Std 1149.6 for full details.
Below is a short synopsis.
First, the output signal is forced to the state matching the value (a non-inverted state) in its associated Boundary-Scan
Register data cell for its driver (true and inverted values for a differential pair), at the falling edge of TCK in update-IR. Then
the output signal transitions to the opposite state (an inverted state) on the first falling edge of TCK that occurs after
entering the Run-Test/Idle TAP Controller state. While remaining in this state, the output signal will continue to invert on
every falling edge of TCK, thereby generating a pulse train.
15.5.8 RESERVED
Reserved instructions implement various test modes used in the device manufacturing process. The user should not
enable these instructions.
15.5.9 PRIVATE
Private instructions implement various test modes used in the device manufacturing process. The user should not
enable these instructions.
15.6 Usage Considerations
As previously stated, there are internal pull-ups on TRST, TMS, and TDI. However, TCK also needs to be driven to a
known value. It is best to either drive a zero on the TCK pin when it is not being used or to use an external pull-down
resistor. In order to guarantee that the JTAG does not interfere with normal system operation, the TAP controller should be
forced into the Test-Logic-Reset controller state by continuously holding TRST low and/or TMS high when the chip is in
normal operation. If JTAG will not be used, externally pull-down TRST low to disable it.
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March 19, 2007
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
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