80KSBR200 Datasheet, PDF (132/172 Pages) Integrated Device Technology – sRIO SERIAL BUFFER FLOW-CONTROL DEVICE

IDT 80KSBR200
Notes
Advanced Datasheet*
156.25MHz
Symbol
Parameter
Clock Parameters
tKHKH
Clock Cycle Time (K,K,C,C)
tKC var
Clock Phase Jitter (K,K,C,C)
tKHKL
Clock High Time (K,K,C,C)
Min. Max. Unit Notes
6.00 8.40 ns
-
0.20 ns
1
2.40
-
ns
5
tKLKH
tKHKH
Clock Low Time (K,K,C,C)
Clock to clock (K K,C C)
2.40
-
ns
5
2.70
-
ns
6
tKHKH
tKHCH
Clock to clock (K K,C C)
Clock to data clock (K C,K C)
2.70
-
ns
6
0.00 2.80 ns
tCK lock
DLL lock tim (K, C)
tKC reset
K static to DLL reset
Output Parameters
1024
- cycles 2
30
-
ns
tCHQV
tCHQX
tCHCQV
C, C HIGH to output valid
C, C HIGH to output hold
C, C HIGH to echo clock valid
-
0.50 ns
3
-0.50
-
ns
3
-
0.50 ns
3
tCHCQX
tCQHQV
C, C HIGH to echo clock hold
CQ, CQ HIGH to output valid
-0.50
-
ns
3
-
0.40 ns
tCQHQX
tCHQZ
tCHQX1
CQ, CQ HIGH to output hold
C HIGH to output High-Z
C HIGH to output Low-Z
-0.40
-
ns
-
0.50 ns
3
-0.50
-
ns
3
Set-Up Times
tAVKH
Address valid to K, K rising edge
0.50
-
ns
4
tIVKH
tDVKH
R, W inputs valid to K, K rising edge
Data-in valid to K, K rising edge
0.50
-
ns
0.50
-
ns
Hold Times
tKHAX
tKHIX
K, K rising edge to address hold
K, K rising edge to R, W inputs hold
0.50
-
ns
6
0.50
-
ns
tKHDX
K, K rising edge to data-in hold
0.50
-
ns
Note:
1.
2.
3.
4.
5.
6.
Table 102 AC Electrical Characteristics
Clock phase jitter is the variance from clock rising edge to the next expected clock rising edge.
Vdd slew rate must be less than 0.1V DC per 50ns for DLL lock retention. DLL lock time begins once Vdd and
input clock are stable.
If C, C are tied High, K, K become the references for C, C timing parameters.
All address inputs must meet the specified setup and hold times for all latching clock edges.
Clock High time (tKHKL) and Clock Low time (tKLKH) should be within 40% to 60% of the duty cycle time
(tKHKH).
Clock to Clock time (tKHKH) and Clock to Clock time (tKHKH) should be within 45% to 55% of the duty cycle
time (tKHKH).
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March 19, 2007
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.