MB86296 Datasheet, PDF (59/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
5.4.5 Arbitration
When other masters have transmitted data simultaneously at the time of master transmission,
arbitration takes places. When its own transmitting data is “1” and the data on SDA line is “0”, the
master considers that the arbitration was lost and sets “1” to AL. And if the master is going to generate
START condition while the bus is in use by other master, it will consider that arbitration was lost and
will set “1” to AL.
When the START condition which other masters generated is detected by the time the master actually
generated START condition, even when it checked the bus is in nonuse state and wrote in MSS=”1”, it
considers that the arbitration was lost and sets “1” to AL.
When AL bit is set to “1”, a master will set MSS=”0” and TRX= “0” and it will be a slave receiving mode.
When the arbitration is lost (it has no royalty of a bus), a master stops a drive of SDA. However, a
drive of SCL is not stopped until 1 byte transfer is completed and interruption is cleared.
5.4.6 Acknowledge
Acknowledge is transmitted from a reception side to a transmission side. At the time of data reception,
acknowledge is stored in LRB bit by ACK bit.
When the acknowledge from a master reception side is not received at the time of slave transmission,
it sets TRX=”0” and becomes slave receiving mode. Thereby, a master can generate STOP condition
when a slave opens SCL.
5.4.7 Bus error
When the following conditions are satisfied, it is judged as a bus error, and this interface will be in a
stop state.
- Detection of the basic regulation violation on I2C-bus under data transfer (including ACK bit)
- Detection of STOP condition in a master mode
- Detection of the basic regulation violation on I2C-bus at the time of bus idol
SDA
SCL
START
D7
D6
D5
1
2
3
SDA changed under data transmission (SCL=H). It becomes bus error.
MB86296S <Coral-PA>
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Specification Manual Rev0.1