MB86296 Datasheet, PDF (201/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
0: Received data is not the 1st byte.
1: Received data is the 1st byte (address data).
BCR (Bus Control Register)
Register
address
I2C Base Address + 0004h
Bit No
7
6
5
4
3
2
1
0
Bit field name BER
BEIE
SCC
MSS
ACK GCAA INTE
INT
R/W
R/W0 R/W R0/W1 R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit7
BER (Bus Error)
Flag bit for request of bus error interruption
When this bit is set, EN bit on CCR register will be cleared, this module will be in a stop
state and data transfer will be discontinued.
write case
0: A request of buss error interruption is cleared.
1: Don’t care.
read case
0: A bus error was not detected.
1: Undefined START condition or STOP condition was detected while data transfer.
Bit6
BEIE (Bus Error Interruption Enable)
Permit bus error interruption
When both this bit and BER bit are “1”, the interruption is generated.
0: Prohibition of bus error interruption
1: Permission of bus error interruption
Bit5
SCC (Start Condition Continue)
Generate START condition
write case
0: Don’t care.
1: START condition is generated again at the time of master transmission.
Bit4
MSS (Master Slave Select)
Select master / slave mode
When arbitration lost is generated in master transmission, this bit is cleared and this
module becomes a slave mode.
0: This module becomes a slave mode after generating STOP condition and completing
transfer.
1: This module becomes a master mode, generates START condition and starts transfer.
Bit3
ACK (ACKnowledge)
Permit generation of acknowledge at the time of data reception
This bit becomes invalid at the time of address data reception in a slave mode.
0: Acknowledge is not generated.
1: Acknowledge is generated.
Bit2
GCAA(General Call Address Acknowledge)
Permit generation of acknowledge at the time of general call address reception
0: Acknowledge is not generated.
1: Acknowledge is generated.
Bit1
INTE (INTerrupt Enable)
Permit interruption
When this bit is “1” interruption is generated if INT bit is “1”.
0: Prohibition of interrupt
MB86296S <Coral-PA>
191
Specification Manual Rev0.1