MB86296 Datasheet, PDF (33/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
C 16 MD39
B 17 MD40
A 18 MD41
C 15 VL
B 16 MD42
D 17 VS
D 14 MD43
C 14 VH
A 17 MD44
B 15 MD45
A 16 MD46
D 15 MD47
C 13 MD48
B 14 MD49
A 15 MD50
B 13 VL
D 12 MD51
C 12 MD52
A 14 MD53
D 13 VS
B 12 VH
A 13 MD54
C 11 MD55
B 11 MD56
A 12 MD57
D 11 MD58
MB86296S <Coral-PA>
Specification Manual Rev0.1
I/O Graphics memory data bit 32. May also be
configured as Green[1] for the RGB output.
I/O Graphics memory data bit 32. May also be
configured as Green[2] for the RGB output.
I/O Graphics memory data bit 32. May also be
configured as Green[3] for the RGB output.
- VDDL 1.8V power supply.
I/O Graphics memory data bit 32. May also be
configured as Green[4] for the RGB output.
- VSS - ground.
I/O Graphics memory data bit 32. May also be
configured as Green[5] for the RGB output.
- VDDH 3.3V power supply.
I/O Graphics memory data bit 32. May also be
configured as Green[6] for the RGB output.
I/O Graphics memory data bit 32. May also be
configured as Green[7] for the RGB output.
I/O Graphics memory data bit 32. May also be
configured as Red[0] for the RGB output.R0
I/O Graphics memory data bit 32. May also be
configured as Red[1] for the RGB output.R1
I/O Graphics memory data bit 32. May also be
configured as Red[2] for the RGB output.R2
I/O Graphics memory data bit 32. May also be
configured as Red[3] for the RGB output.R3
I/O Graphics memory data bit 32. May also be
configured as Red[4] for the RGB output.R4
- VDDL 1.8V power supply.
I/O Graphics memory data bit 51. May also be
configured as Red[5] for the RGB output.R5
I/O Graphics memory data bit 52. May also be
configured as Red[6] for the RGB output.R6
I/O Graphics memory data bit 53. May also be
configured as Red[7] for the RGB output. R7
- VSS - ground.
- VDDH 3.3V power supply.
I/O Graphics memory data bit 54. May also be
configured as I²C serial data (SDA).
I/O Graphics memory data bit 55. May also be
configured as I²C serial clock (SCL).
I/O Graphics memory data bit 56. May also be
configured as ITU-RBT-656 video capture data input
bit 0 (VI0). When the RGB input is enabled this pin
acts as Blue[0].
I/O Graphics memory data bit 57. May also be
configured as ITU-RBT-656 video capture data input
bit 1 (VI1). When the RGB input is enabled this pin
acts as Blue[1].
I/O Graphics memory data bit 58. May also be
configured as ITU-RBT-656 video capture data input
bit 2 (VI2). When the RGB input is enabled this pin
acts as Blue[2].
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