MB86296 Datasheet, PDF (270/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
RGBHC(RGB input Hsync Cycle)
Register
address
CaputureBaseAddress + 80h
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
VIN_HSSIZE / RGBHC
R/W
RX
R/W
Initial value
X
X
Bit13-0
RGBHC
This register sets number of HSYNC cycles of the RGB input. . It is used when it is made a
setup which samples VSYNC. The setting value +1 is a level cycle.
RGBHEN(RGB input Horizontal Enable area)
Register
address
CaputureBaseAddress + 84h
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name Reserved
RGBHST
Reserve
d
RGBHEN
R/W
RX
R/W
RX
R/W
Initial value
X
X
X
X
It is a parameter for determining effective pixel data.
Bit12-0
RGBHEN(RGB input Horizontal Enable area Size)
Effective pixel data size is set up per pixel. Specify the number of horizontal pixels in 2-
pixel units
Bit25-16
RGBHST(RGB input Horizontal Enable area Start position)
The start position of effective pixel data is set up. The setting value -4 is a start position.
Note:
- The maximum horizontal enable area size(RGBHEN) which can be captured is 840
pixels. This is the restriction by line buffer size in a video capture module.
MB86296S<Coral-PA>
260
Specification Manual Rev0.1