MB86296 Datasheet, PDF (276/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
13.2.6 Drawing control registers
CTR (Control Register)
Register
address
DrawBaseAddress + 400H
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
FO PE CE
FCNT NF FF FE
SS
DS
PS
R/W
RW RW RW
R
RRR
R
R
R
Initial value
000
011101 0 0 1
00
00
00
This register indicates drawing flags and status information. Bits 24 to 22 are not cleared until 0 is set.
Bit 1 and 0
PS (Pixel engine Status)
Indicate status of pixel engine unit
00 Idle
01 Busy
10 Reserved
11 Reserved
Bit 5 and 4
DS (DDA Status)
Indicate status of DDA
00 Idle
01 Busy
10 Busy
11 Reserved
Bit 9 and 8
SS (Setup Status)
Indicate status of Setup unit
00 Idle
01 Busy
10 Reserved
11 Reserved
Bit 12
FE (FIFO Empty)
Indicates whether data contained or not in display list FIFO
0 Valid data
1 No valid data
Bit 13
FF (FIFO Full)
Indicates whether display list FIFO is full or not
0 Not full
1 Full
Bit 14
NF (FIFO Near Full)
Indicates how empty the display list FIFO is
0 Empty entries equal to or more than half
MB86296S<Coral-PA>
266
Specification Manual Rev0.1