MB86296 Datasheet, PDF (308/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
GMDR1E (Geometry Mode Register for Line Extension)
Register
address
(SetGModeRegister)
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name PO LV
TC
BC UW BM TM
BP SP
BO EP AA
R/W W W
W
W WWW WW
WWW
Initial value 0 0
0
00 0 0
0
00
This register sets the geometry processing extended mode at line drawing.
The CORAL extended function can be used only when the C, Z, and ST fields of GMDR0 are “0”.
This register is sharing hardware with GMDR1, so that if GMDR1E is changed, the same bit of
GMDR1 is also changed.
Bit 31
PO (Primitive Order Control)
Sets the draw order for body/edge/shadow
0 Body -> Edge -> shadow (faster)
1 Shadow -> Edge -> Body (quality for anti-alias)
Bit 30 LV (Line Version Control)
Sets the Coral Line algorithm version
0 Version 1.0 (for backward compatibility)
1 Version 2.0 (recommended)
Bit 20 TC (Thick line Correct)
Sets the interpolation mode for the bold line joint
0 Interpolation of bold line joint not performed
1 Interpolation of bold line joint performed
Bit 16 BC (Broken line Correct)
Sets the interpolation mode for the dashed-line pattern
0 Interpolation not performed
1 Interpolation performed using dashed-line pattern reference address fixed mode
Bit 14 UW (Uniform line Width)
Sets the line width equalization mode
0 ^{Equalization of line width not performed}
1 Equalization of line width performed
Bit 13 BM (Broken line Mode)
Sets the dashed-line pattern mode
0 Dashed-line pattern pasted vertical to principal axis of line (compatible with
CREMSON).
1 Dashed-line pattern pastedvertical to theoretical line
Bit 12 TM (Thick line Mode)
Sets the bold line mode
MB86296S<Coral-PA>
298
Specification Manual Rev0.1