MB86296 Datasheet, PDF (164/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
Memory Base Address Register
Bit
Type Reset Value
31
RW
0
Description
Memory Base Address. This determines the address of the first Coral-PA
non PCI register. The Coral-PA will respond as a Target to accesses in
the address range:
(memory_base_address) to (memory_base_address + 3FF0000H)
Subsystem Vendor ID Register
Bit
Type Reset Value
15-0
ER
0
Description
Subsystem Vendor ID. This register can be loaded from EEPROM.
Subsystem ID Register
Bit
Type Reset Value
15-0
ER
0
Description
Subsystem ID. This register can be loaded from EEPROM
Interrupt Line Register
Bit
Type
Reset Value
7-0
RW
0
Interrupt Pin Register
Bit
Type
Reset Value
7-0
RW
1
Description
Interrupt Line Register. Used to convey interrupt line routing information.
Description
Identifies which PCI Interrupt pin the Coral-PA is connected to. The
default value of this indicate that the Coral-PA is connected to the INTA
line, which is the usual setting for this field.
Min Grant Register
Bit
Type
Reset Value
7-0
ER
0
Description
Identifies the maximum length of PCI burst period the Coral-PA needs.
This should be left at the reset setting.
Max Latency Register
Bit
Type
Reset Value
7-0
ER
0
Description
Specifies how often the Coral-PA needs to access the bus. This should
be left at the reset settings.
TRDY Timeout Value Register
Bit
Type
Reset Value
7-0
RW
80h
Retry Timeout Value Register
Bit
Type
Reset Value
7-0
RW
80h
Description
Sets the number of PCI clocks the Coral-PA will wait for TRDY, when
acting as a Bus Master.
Description
Sets the number of retries of the Coral-PA will perform when acting as a
Bus Master.
User Programmable Register
Bit
Type
Reset Value
31-0
ER
0
MB86296S<Coral-PA>
Specification Manual Rev0.1
Description
User programmable register
154