MB86296 Datasheet, PDF (28/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
2.2.2 Pin assignment table
JEDEC Number Pin Name I/O
Function
B 2 GI3 Input RGB Input Green[3]. May also be configured as
GPIO input.
C 2 GI4 Input RGB Input Green[4]. May also be configured as
GPIO input.
D 3 DCKI Input Video output interface dot clock input.
E 4 VH
- VDDH - 3.3V power supply.
B 1 VSYN I/O Video output interface vertical sync output. Vertical
sync input in external sync mode.
E 3 HSYN I/O Video output interface horizontal sync output.
Horizontal sync input in external sync mode.
D2
DE Output Video output interface display enable period.
C 1 GV Output Video output interface graphics/video switch.
F 3 CSYN Output Video output interface composite sync output.
E 2 DCKO Output Video output interface dot clock signal for display.
D 4 VS
- VSS - ground.
G4
VL
- VDDL 1.8V power supply.
G3
SB
I/O Host interface Slave Busy signal. May also be
configured as GPIO input/output. In addition this
signal is used as RGB input Green[5] and serial
interface strobe depending on configuration.
D1
BC
I/O Host interface Burst Complete signal. May also be
configured as GPIO input/output. In addition this
signal is used as RGB input Red[0].
F 2 EDO I/O PCI configuration EEPROM data output. May also
be configured as GPIO input/output. In addition this
signal is used as RGB input Red[1] and serial
interface data out depending on configuration.
E 1 REQ Output PCI request.
F 4 XINT Output External interrupt. By default (and PCI standard) it is
(open drain) active low. However it may be configured as active
high if desired.
H
3
VH
- VDDH 3.3V power supply.
G
2
VS
- VSS - ground.
F 1 ECK I/O PCI configuration EEPROM clock output. May also
be configured as GPIO input/output. In addition this
signal is used as RGB input Red[2] and serial
interface clock out depending on configuration.
H 2 ECS I/O PCI configuration EEPROM select output. May also
be configured as GPIO input/output. In addition this
signal is used as RGB input Red[3] depending on
configuration.
J
4
TC
I/O Host interface transfer complete. May also be
configured as GPIO input/output. Note that the state
of this pin is latched at external reset to help provide
initial I/O configuration. If it is in an active high state
then the EEPROM enable register bit is set.
J
3
VL
- VDDL 1.8V power supply.
G 1 XRST Input Device reset.
MB86296S<Coral-PA>
18
Specification Manual Rev0.1