MB86296 Datasheet, PDF (335/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
15.5.2 I²C Interface
I²C bus timing
symbol
MIN
MAX
TS2SDAI
SDA(I) setup time
standard
250
high-speed
100
TH2SDAI
SCL(I) hold time
standard
0
high-speed
0
TCSCLI
SCL(I) cycle time
standard
10.0
high-speed
2.5
TWHSCLI
SCL(I) H period
standard
4.0
high-speed
0.6
TWLSCLI
SCL(I) L period
standard
4.7
high-speed
1.3
TCSCLO
SCL(O) cycle time
standard
2*m+2(*2)
high-speed int(1.5*m)+2(*2)
TWHSCLO
SCL(O) H period
standard
m+2(*2)
high-speed int(0.5*m)+2(*2)
TWLSCLO
SCL(O) L period
standard
m(*2)
high-speed
m(*2)
TW2SCLI
SCL(I) setup time
standard
4.0
high-speed
0.6
TH2SCLI
SCL(I) hold time
standard
4.7
high-speed
1.3
TWBFI
bus free time
standard
4.7
hirh-speed
1.3
TS2SCLO
SCL(O) set up time
standard
m+2(*2)
high-speed int(0.5*m)+2(*2)
TH2SCLO
SCL(O) hold time
standard
m-2(*2)
high-speed int(0.5*m)-2(*2)
TH2SDAO
SDA(O) hold time
5
*1 PCLK is an internal clock of I2C module. (16.6MHz)
*2 Refer to the clock control register (CCR) for the value of m.
unit
ns
ns
ns
ns
us
us
us
us
us
us
PCLK*1
PCLK*1
PCLK*1
PCLK*1
PCLK*1
PCLK*1
us
us
us
us
us
us
PCLK*1
PCLK*1
PCLK*1
PCLK*1
PCLK*1
Timing of interrupt
symbol
TPHINTR
TPHINTR
XINT delay (bus error)
XINT delay (except bus error)
MIN
MAX
unit
4
PCLK
4
PCLK
MB86296S <Coral-PA>
325
Specification Manual Rev0.1