MB86296 Datasheet, PDF (265/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
CBOA (video Capture Buffer Origin Address)
Register
address
CaputureBaseAddress + 14h
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
CBOA
R/W
RX
R/W
R0
Initial value
Don’t care
Don’t care
0
This register specifies the starting (origin) address of the video capture buffer.
CBLA (video Capture Buffer Limit Address)
Register
address
CaputureBaseAddress + 18h
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
CBLA
R/W
RX
R/W
R0
Initial value
Don’t care
Don’t care
0
This register specifies the end (limit) address of the video capture buffer.
CBLA must be larger than CBOA.
CIHSTR (Capture Image Horizontal STaRt)
Register
address
CaputureBaseAddress + 1Ch
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
CIHSTR
R/W
RX
R/W
Initial value
Don’t care
Don’t care
This register sets the range of the images to be written (captured) to the video capture buffer.
Specify the X coordinates located in the top left of the image range as the count of pixels from the
top left of the image. For downscaling, apply this setting to the post-reduction image coordinates.
MB86296S <Coral-PA>
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Specification Manual Rev0.1