MB86296 Datasheet, PDF (213/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
HTP (Horizontal Total Pixels)
Register
address
DisplayBaseAddress + 06H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
HTP
R/W
R0
RW
Initial value
0
Don’t care
This register controls the horizontal total pixel count. Setting value + 1 is the total pixel count.
HDP (Horizontal Display Period)
Register
address
DisplayBaseAddress + 08H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
HDP
R/W
R0
RW
Initial value
0
Don’t care
This register controls the total horizontal display period in unit of pixel clocks. Setting value + 1 is
the pixel count for the display period.
HDB (Horizontal Display Boundary)
Register
address
DisplayBaseAddress + 0AH
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
HDB
R/W
R0
RW
Initial value
0
Don’t care
This register controls the display period of the left part of the window in unit of pixel clocks. Setting
value + 1 is the pixel count for the display period of the left part of the window. When the window is
not divided into right and left before display, set the same value as HDP.
HSP (Horizontal Synchronize pulse Position)
Register
address
DisplayBaseAddress + 0CH
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
HSP
R/W
R0
RW
Initial value
0
Don’t care
This register controls the pulse position of the horizontal synchronization signal in unit of pixel
clocks. When the clock count since the start of the display period reaches setting value + 1, the
horizontal synchronization signal is asserted.
HSW (Horizontal Synchronize pulse Width)
Register
address
DisplayBaseAddress + 0EH
Bit number 7
6
5
4
3
2
1
0
Bit field name
HSW
R/W
RW
Initial value
Don’t care
This register controls the pulse width of the horizontal synchronization signal in unit of pixel clocks.
Setting value + 1 is the pulse width clock count.
MB86296S <Coral-PA>
203
Specification Manual Rev0.1