MB86296 Datasheet, PDF (163/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
PCI Status Register
Bit
Type Reset Value
15
Status
0
14
Status
0
13
Status
0
12
Status
0
11
Status
0
10-9
RO
01
8
Status
0
7
RO
1
6
-
0
5
RO
0
4-0
-
-
Revision ID Register
Bit
Type
Reset Value
7-0
ER
01h
PCI Class Code Register
Bit
Type
Reset Value
23-0
ER
038000h
Casheline Size Register
Bit
Type
Reset Value
7-0
RW
0
Master Latency Timer Register
Bit
Type
Reset Value
7-2
RW
0
1-0
-
0
Description
Parity Error has been detected by the Coral-PA.
System Error has been signaled by the Coral-PA.
Received Master Abort. Set to ‘1’ when a PCI Master terminates a user
to the Coral-PA transaction with Master Abort.
Received Target Abort. Set to ‘1’ when the Coral-PA has initiated a
transaction that has been terminated by Target Abort.
Target Abort has been signaled by the Coral-PA.
Device Select Timing. Indicates the timing of the DEVSEL# signal when
the Coral-PA responds as a PCI Target.
Data Parity Error detected.
Fast Back-to-Back Capable Status Flag.
Reserved
66MHz Capable Flag.
Reserved
Description
Revision ID of the Coral-PA.
Description
Class Code of the Coral-PA. The Reset value means “Display Controller”
of non-specific type.
Description
Casheline Size.
Description
Master Latency Timer Count Value. This register sets the minimum
number of PCI clocks the Coral-PA is guaranteed access to the PCI bus.
After the count has expired, the Coral-PA releases the PCI bus as soon
as another PCI Master is granted the bus by the bus arbiter.
Reserved
Header Type Register
Bit
Type
Reset Value
7-0
ER
0
BIST Register
Bit
Type
7-0
-
Reset Value
0
MB86296S <Coral-PA>
Specification Manual Rev0.1
Description
As defined in the PCI Specification, Section 6.2.1.
Description
This field is not used by the Coral-PA, so it is hard-wired to zero.
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