MB86296 Datasheet, PDF (282/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
MDR2/MDR2S/MDR2TL (Mode Register for Polygon/for Shadow/for TopLeft)
Register
address
DrawBaseAddress + 428H
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
TT
LOG BM ZW ZCL ZC AS SM
R/W
RW
Initial value
00
RW RW RW RW RW RW RW
0011 0 0 0000 0 0 0
This register sets the polygon drawing mode.
This register is used for the body primitive, for the shade primitive, and for the top-left non-
applicable primitive.
The value after a drawing that involves the shade primitive or the top-left non-applicable primitive is
the value set for MDR2.
(Must set SM=AS=TT=0 for MDR2S)
Bit 0
SM (Shading Mode)
Sets shading mode
0 Flat shading
1 Gouraud shading
Bit 1
AS (Alpha Shading mode)
Sets alpha shading mode. This mode is enabled for only alpha.
0 Alpha flat shading
1 Alpha gouraud shading
Bit 2
ZC (Z Compare mode)
Sets Z comparison mode
0 Disabled
1 Enabled
Bit 5 to 3
ZCL (Z Compare Logic)
Selects type of Z comparison
000 NEVER
001 ALWAYS
010 LESS
011 LEQUAL
100 EQUAL
101 GEQUAL
110 GREATER
111 NOTEQUAL
Bit 6
ZW (Z Write mask)
Sets Z write mode
0 Writes Z values
1 Not write Z values
MB86296S<Coral-PA>
272
Specification Manual Rev0.1