MB86296 Datasheet, PDF (190/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
Bit 6
Bit 15 to
Bit 7
Bit 29 to
Bit 16
SER (SERial Interface enable)
If set to “1b” then the serial interface is enabled. This field is ignored if either the RGB input
or EEPROM is enabled. For the serial interface strobe signal to be used the SBE field must
also be clear (“0b”).
GD (GPIO Direction)
Specifies the direction of pins acting as GPIO. If a bit is “0b” then the pin acts as an input.
Otherwise if set to “1b” it operates as an output. The mapping to pins is:
Bit 7: EDO
Bit 8: EDI
Bit 9: ECK
Bit 10: ECS
Bit 11: EE
Bit 12: BC
Bit 13: TC
Bit 14: SB
Bit 15: BEN
GIM (GPIO Interrupt Mask)
Masks (enables) interrupt triggering on a GPIO pin by pin basis. If a bit is set to “1b” then a
change in stage of that pin (0->1 or 1->0) can trigger an interrupt via the IST register.
Otherwise if set to “0b” no interrupt will be triggered. Care should be taken to disable
interrupts on pins not operating as GPIO inputs, otherwise unwanted interrupts may occur.
The mapping to pins is:
Bit 16: EDO
Bit 17: EDI
Bit 18: ECK
Bit 19: ECS
Bit 20: EE
Bit 21: BC
Bit 22: TC
Bit 23: SB
Bit 24: BEN
Bit 25: GI0
Bit 26: GI1
Bit 27: GI2
Bit 28: GI3
Bit 29: GI4
MB86296S<Coral-PA>
180
Specification Manual Rev0.1