MB86296 Datasheet, PDF (280/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
MDR1/MDR1S/MDR1B (Mode Register for LINE/for Shadow/for Border)
Register
address
DrawBaseAddress + 424H
Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
LW
BP BL
LOG BM ZW ZCL ZC AS
R/W
Initial value
RW
00000
RW RW
00
RW RW RW RW RW RW
0011 0 0 0000 0 0
This register sets the mode of line and pixel drawing.
This register is used for the body primitive, for the shade primitive, for the edge primitive.
The value after a drawing that involves the shade primitive, the edge primitive, or the top-left non-
applicable primitive is the value set for MDR1.
Please set ZC bit ( bit 2 ) to 0 when draw BltCopyAltAlphaBlendP command.
Bit 1
AS (Alpha Shading mode)
Sets the shading mode for alpha.
0 Alpha flat shading
1 Alpha Gouraud shading
Bit 2
ZC (Z Compare mode)
Sets Z comparison mode
0 Disabled
1 Enabled
Bit 5 to 3
ZCL (Z Compare Logic)
Selects type of Z comparison
000 NEVER
001 ALWAYS
010 LESS
011 LEQUAL
100 EQUAL
101 GEQUAL
110 GREATER
111 NOTEQUAL
Bit 6
ZW (Z Write mode)
Sets Z write mode
0 Writes Z values.
1 Not write Z values.
Bit 8 to 7 BM (Blend Mode)
Sets blend mode
00 Normal (source copy)
01 Alpha blending
10 Drawing with logic operation
MB86296S<Coral-PA>
270
Specification Manual Rev0.1