MB86296 Datasheet, PDF (36/352 Pages) Fujitsu Component Limited. – PCI Graphics Controller Specification

FUJITSU LIMITED PRELIMINARY AND CONFIDENTIAL
2.3 Pin Function
2.3.1 Host CPU interface
Pin name
AD0-31
CBE0-3
PAR
FRM
TRDY
IRDY
STOP
DSEL
IDSEL
PERR
SERR
REQ
GNT
PCLK
XRST
XINT
BC
TC
BEN
SB
Table 2-1 Host CPU Interface Pins
I/O
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
Input
In/Out
Output
(Open Drain)
Output
Input
Input
Input
Output
(Open Drain)
Output
Output
Input
Output
Description
PCI Address/Data
PCI Bus Command/Byte Enable
PCI Parity
PCI Cycle Frame
PCI Target Ready
PCI Initiator Ready
PCI Stop
PCI Device Select
PCI Initialisation Device Select
PCI Parity Error
System Error
PCI Bus Master Request
PCI Bus Grant
PCI Clock – 33MHz
System Reset (including PCI)
Interrupt
Burst Complete. Indicates a burst is complete when using
the DMA/Burst Controller.
This pin may also be configured as a GPIO Input/Output and
acts as RI0 (Red Input 0) when the RGB Input is enabled.
Transfer Complete. Indicates that a whole transfer is
complete when using the DMA/Burst Controller.
This may also be configured as a GPIO Input/Output.
In addition this pin may be used to automatically enable the
EEPROM at the reset phase. To do this a pull up should be
applied.
Enables the Burst Controller to start/continue execution.
This pin may also be configured as a GPIO Input/Output.
In addition this pin may be used to automatically enable the
RGB Input pins as RGB inputs. To do this a pull up should
be applied.
Slave Busy. Indicates that the PCI Slave is busy completing
a write transfer.
This pin may also be configured as a GPIO Input/Output, the
Serial Interface Strobe Output and acts as GI5 (Green Input
5) when the RGB Input is enabled.
MB86296S<Coral-PA>
26
Specification Manual Rev0.1