MC68HC11G5 Datasheet, PDF (99/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
R8 — Receive Data Bit 8
READ: Any time.
WRITE: Has no meaning or effect.
This bit is the ninth serial data bit received when the SCI system is configured for nine
data bit operation (M = 1). The most significant bit (bit 8) of the received character is
transferred into this bit at the same time as the remaining eight bits (bits 0 – 7) are
transferred from the serial receive shifter to the SCI receive data register.
T8 — Transmit Data Bit 8
READ: Any time.
WRITE: Any time.
This bit is the ninth data bit to be transmitted when the SCI system is configured for nine
data bit operation (M = 1). When the eight low order bits (bits 0 – 7) of a transmit character
are transferred from the SCI data register to the serial transmit shift register, this bit (bit 8)
is transferred to the ninth bit position of the shifter.
M — Mode (select character format)
READ: Any time.
WRITE: Any time.
0 – 1 start bit, 8 data bits, 1 stop bit.
1 – 1 start bit, 8 data, 9th data bit, 1 stop bit.
The M bit controls the character length for both the transmitter and receiver at the same
time. The 9th data bit is most commonly used as an extra stop bit or in conjunction with
the “address mark” wake-up method. It can also be used as a parity bit.
WAKE — Wake-up Mode Select
READ: Any time.
WRITE: Any time.
0 – Wake-up on idle line.
1 – Wake-up on address mark.
Note: Bits 2 – 1 are not implemented and always read as zeros.
7.8.3 Serial Communications Control Register 2 (SCCR2)
The SCI control register 2 (SCCR2) provides the control bits that enable/disable individual SCI
functions.
7
6
5
4
3
$102D TIE TCIE RIE ILIE TE
RESET:
0
0
0
0
0
2
1
0
RE RWU SBK SCCR2
0
0
0
SERIAL COMMUNICATIONS INTERFACE
7-9
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