MC68HC11G5 Datasheet, PDF (83/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
EDGxB
EDGxA
Configuration
Note:
0
0
0
1
1
0
1
1
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
input captures do not force the direction of the associated port. If the port bit associated
with an input capture is programmed to be an output, then input captures will occur on
the appropriate changes of state caused by writing to the port.
6.4.13 Timer Control Register 3 (TCTL3)
7
6
5
4
3
2
1
0
$1050 EDG5B EDG5A EDG6B EDG6A OM6 OL6 OM7 OL7 TCTL3
RESET:
0
0
0
0
0
0
0
0
READ: Any time.
WRITE: Any time.
RESET: $00
EDGxB, EDGxA — Input Capture Edge Control
These control bits configure the input capture edge detector circuits for input captures
IC5 and IC6.
EDGxB
EDGxA
Configuration
0
0
0
1
1
0
1
1
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
Input capture IC5 only functions if the TO6I5 register is programmed for input capture IC5
operation by the I5/O6 bit in the TCTL4 register being set to one. Input capture IC6
functions only if the TO7I6 register is programmed for input capture IC5 operation by the
I6/O7 bit in the TCTL4 register being set to one.
OMx, OLx — Output Mode, Output Level
These control bits are encoded to specify the output action to be taken as a result of
successful compares on OC6 and OC7. When either OMx or OLx is set to one, the pin
associated with OCx becomes an output tied to OCx, regardless of the state of the
associated DDR bit.
PROGRAMMABLE TIMER
6-13
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