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MC68HC11G5 Datasheet, PDF (114/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Freescale Semiconductor, Inc.
9.1 CONVERSION PROCESS
The A/D converter is ratiometric. An input voltage equal to Vrh converts to $FFC0 (full scale) and
an input voltage equal to Vrl converts to $0000. An input voltage greater than Vrh will convert to
$FFC0 with no overflow indication. Note that the six least significant bits always read zero. For
ratiometric conversions, the source of each analog input should use Vrh as the supply voltage and
be referenced to Vrl.
The A/D reference inputs are applied to a precision internal digital-to-analog converter. Control logic
drives this D/A and the analog output is successively compared to the selected analog input which
was sampled at the beginning of the conversion time. The conversion process is monotonic with no
missing codes.
9.2 CHANNEL ASSIGNMENTS
A multiplexer allows the single A/D converter to select one of sixteen analog signals. Eight of these
channels are supported on the Port E input pins. Of the eight other channels, four are reserved for
future use and four are for internal reference points and testing purposes. Table 9-1 shows the
signals selected by the channel select bits (CD, CC, CB, CA) in the ADCTL register. All “reserved”
channels are connected to Vrl.
Table 9-1. Channel Assignments
CONV8 = 0
Result in register if
CD CC CB CA Channel Signal MULT = 1 MULT = 0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
AN1 (PE0)
AN2 (PE1)
AN3 (PE2)
AN4 (PE3)
ADR5
ADR6
ADR7
ADR8
ADR5 – 8
ADR5 – 8
ADR5 – 8
ADR5 – 8
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
AN5 (PE4)
AN6 (PE5)
AN7 (PE6)
AN8 (PE7)
ADR5
ADR6
ADR7
ADR8
ADR5 – 8
ADR5 – 8
ADR5 – 8
ADR5 – 8
1
0
X
X
reserved
1
1
0
0
Vrh
ADR5 ADR5 – 8
1
1
0
1
Vrl
ADR6 ADR5 – 8
1
1
1
0
Vrh/2
ADR7 ADR5 – 8
1
1
1
1
Test (reserved) ADR8 ADR5 – 8
ANALOG-TO-DIGITAL CONVERTER
9-2
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