MC68HC11G5 Datasheet, PDF (23/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
FCOP — Force COP Watchdog Failure
0 – Normal operation
1 – Immediately generates a COP failure reset. Note that COP must be otherwise
enabled for the reset to be generated; NOCOP = 0.
CBYP2 — Timer Counter 2 Chain By-pass
0 – Normal operation
1 – 16-bit free running timer counter 2 is divided into 8-bit halves and the prescaler is
by-passed. The system E-clock drives both halves directly.
The DISR control bit has priority over the FCM and FCOP control bits such that, if DISR
is set to one, no reset results even when FCM or FCOP is set to one.
2.2 SIGNAL DESCRIPTION
The following table shows the pin usage for the MC68HC11G5.
5 Volt Supply (V_DD, V_DDL, V_DDR)
3
Ground (V_SS, V_SSL, V_SSR)
3
RESET
1
Oscillator (XTAL, EXTAL)
2
E
1
R/W
1
IRQ
1
XIRQ
1
HALT
1
Mode Select (V_kam & LIR)
2
Analog Reference (V_rh, V_rl)
2
8-bit Ports (7)
56
6-bit Port (1)
6
4-bit Port (1)
4
——————————————————————
Total
84 pins
The following paragraphs describe the input/output signals used by the various functions of
the MCU.
2.2.1 Input Power (V_DD) and Ground (V_SS)
Power is supplied to the MCU via three positive supply pins (V_DD) and three ground pins (V_SS). Note
that, for ease of identification, the V_DD pins on the left and right sides of the device package are called
V_DDL and V_DDR, respectively. Similarly, the V_SS pins on the left and right sides of the device package
are called V_SSL and V_SSR.
OPERATING MODES AND SIGNAL DESCRIPTION
2-5
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