MC68HC11G5 Datasheet, PDF (124/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller

Freescale Semiconductor, Inc.
10.4 BOUNDARY CASES
The following boundary conditions cause these results:
If PWDTYx = $00, PWPERx > $00, PPOLx = 0;
the output is always high.
If PWDTYx = $00, PWPERx > $00, PPOLx = 1;
the output is always low.
If PWDTYx = or > PWPERx, PPOLx = 0;
the output is always low.
If PWDTYx = or > PWPERx, PPOLx = 1;
the output is always high.
If PWPERx = $00 & PPOLx = 0;
output x is always low.
If PWPERx = $00 & PPOLx = 1;
output x is always high.
10.5 PWM REGISTERS
10.5.1 Counter Registers (PWCNTX)
Each channel has its own counter. Each counter may be read at any time without affecting the count
or the operation of the PWM channel. Writing to a counter causes the counter to be reset to $00.
Generally, writing to a counter is done before the counter is enabled. Writing to a counter can also
be done while it is enabled (counting), but this may cause a truncated PWM period.
7
6
5
4
3
2
1
0
$1064 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWCNT1
$1065 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWCNT2
$1066 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWCNT3
$1067 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 PWCNT4
READ: Any time.
WRITE: Forces value to $00.
RESET: $00.
When a channel becomes enabled (i.e. when PWENx is written from 0 to 1), the associated PWM
counter starts to count from the value in this PWCNTx register, using whichever clock has been
selected for that channel.
10-4
PULSE WIDTH MODULATION TIMER
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