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MC68HC11G5 Datasheet, PDF (106/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Freescale Semiconductor, Inc.
8.2.1 Master In Slave Out (MISO)
The MISO line is configured as an input in a master device and as an output in a slave device. It is
one of the two lines that transfer serial data in one direction, with the most significant bit sent first.
The MISO line of a slave device is placed in the high-impedance state if the slave is not selected.
8.2.2 Master Out Slave In (MOSI)
The MOSI line is configured as an output in a master device and as an input in a slave device. It is
one of the two lines that transfer serial data in one direction with the most significant bit sent first.
8.2.3 Serial Clock (SCK)
The serial clock is used to synchronize data movement both in and out of the device through its MOSI
and MISO lines. The master and slave devices are capable of exchanging a byte of information
during a sequence of eight clock cycles. Since SCK is generated by the master device, this line
becomes an input on a slave device.
SS
SS
SCK
(CPOL = 0, CPHA = 0)
SCK
(CPOL = 0, CPHA = 1)
SCK
(CPOL = 1, CPHA = 0)
SCK
(CPOL = 1, CPHA = 1)
MISO/MOSI
MSB
6
5
4
3
2
1
LSB
Internal Strobe for Data Capture (All Modes)
Figure 8-1. Data Clock Timing Diagram
SERIAL PERIPHERAL INTERFACE
8-2
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