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MC68HC11G5 Datasheet, PDF (180/195 Pages) Motorola, Inc – High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Freescale Semiconductor, Inc.
13.7 TIMER CHARACTERISTICS
(VDD = 5.0 Vdc ± 10%, V SS = 0 Vdc, TA = TL to TH unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
Timer Pulse Width Input Capture
Pulse Accumulator Input
(PWTIM = t cyc + 20ns) PWTIM
496
—
ns
Timer Output Compare High Valid
tOCH
—
310
ns
Timer Output Compare Low Valid
tOCL
—
295
ns
Timer Input Capture Response Delay
Min = t cyc + 20ns Max = 2 t cyc + 220ns
tCAP
496 1172
ns
NOTES:
1. All timing is shown with respect to 20% V DD and 70% VDD unless otherwise noted.
PA0-PA3/PJ1-PJ21
PA0-PA3/PJ1-PJ22
PA71,3
PA7 2,3
PWTIM
Notes:
1. Rising edge sensitive input.
2. Failing edge sensitive input.
3. Maximum pulse accumulator clocking rate is E frequency divided by 2.
Figure 13-15. Timer Inputs Timing Diagram
13-14
ELECTRICAL SPECIFICATIONS
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